Call for Designs


The design rules for CORNERSTONE multi project wafer (MPW) active run 17 on the 220 nm Si / 2 µm BOX SOI platform have been announced. We will offer three Si etch processes: a shallow Si etch of 70 nm (grating couplers), a intermediate Si etch of 120 nm (rib waveguides) and a continuation etch of a further 100nm to the BOX layer.  We will also offer a 1 µm thick silicon dioxide top cladding layer.
Access to this run is free of charge for UK research institutes (funded by EPSRC). Overseas universities and industrial companies can access this run with the following cost options:
Design area: 11.47 mm x 4.9 mm = £35,000.
Design area: 5.5 mm x 4.9 mm = £20,000.

The full design rules and .gds mask template can be found on the CORNERSTONE website (
The sign-up deadline has been extended to Friday 17th April 2020. The mask submission deadline has been extended to Friday 1st May 2020.

For more information on future calls, visit the Schedule & Cost page (
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